The master chip of SF102 development board is SF1S60CG121I device. SF1 series FPSoC devices are based on low-power technology to realize the integration of FPGA and RISC-V chip advantages with a single chip, involving mass storage resources (PSRAM) and hardcore controllers, 6K logic resources, and integrated MIPI hardcores. They could support single chip loading, fast power-up, non-volatile storage and other technologies, with rich peripheral resources such as AHB Slave, SPI, I2C, UART and GPIO integrated on RISC-V.

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